ECE 260A
Fall 2009
VLSI Digital System
Algorithms and Architectures
Custom and semicustom VLSI design from the system designer’s perspective. VLSI
system algorithms, parallel processing architectures and interconnection
networks, and design mapping methodologies will be emphasized. VLSI
computer-aided design (CAD) tools will be introduced. Knowledge of basic
semiconductor electronics and digital design is assumed. Prerequisites:
undergraduate-level semiconductor electronics and digital system design; ECE
165 or equivalent or consent of instructor. (F)
Instructor:
Mike Bendak
Email: MBendak@cox.net
Office Hour: Monday, Wednesday 5:00 PM – 6:00 PM
Location: EBU1 - 4604
Teaching Assistant: Neelmani Kumar
TA Hour: Tuesday, 1:00 PM – 2:00 PM
Location: EBU1 - 5702
Email: nekumar@ucsd.edu
Text: “CMOS VLSI Design, A Circuits and Systems Perspective”, 3rd Edition,
By Neil Weste and David Harris
Midterm Examination: October 29, Thursday, 6:30-7:50PM, HSS-1330
· Midterm Examination is closed book/closed note.
· You need to bring only pen and pencil.
· NO Electronic Gadgets Please. (e.g. Phone, calculators, etc).
Cadence Tutorial:
Lab Assignment: Due on November 5
Home Work Assignments and Solutions:
Home Work1:
Home Work2:
Home Work3:
Home Work4: